Open to industry internships

Building silicon-photonic
hardware for edge AI.

Deniz Najafi · Ph.D. Candidate, NJIT

I design near-sensor and in-memory computing architectures that bring AI inference to the edge, combining integrated photonics, emerging memory technologies, and ViT-class neural accelerators. Advised by Prof. Shaahin Angizi at the ACAD Lab.

Deniz Najafi
About

A short version

I'm a Ph.D. candidate in the Department of Electrical and Computer Engineering at the New Jersey Institute of Technology, working at the ACAD Lab under Prof. Shaahin Angizi. My research builds hardware that closes the gap between AI workloads and the physical devices that run them.

Concretely, I architect near-sensor and in-memory computing accelerators — using silicon-photonic micro-ring resonators, ReRAM/MeFET crossbars, and SRAM/DRAM PIM — to make vision transformers and neuro-symbolic models efficient enough for sensors and IoT nodes. My work spans the full stack: device-level Verilog-A modeling, circuit and array design in Cadence/HSPICE, and architecture-level evaluation for energy, latency, and accuracy.

I'm a Semiconductor Research Corporation (SRC) Research Scholar and a DAC Young Fellow, with first-author papers at ISVLSI and COINS, contributions to DATE, DAC, CVPR, ICCAD, and GLSVLSI, and a recent DATE 2026 Best Paper Award for in-sensor ViT acceleration. I'm currently exploring industry internships in photonic / hardware AI accelerator R&D.

Research

What I work on

Hardware-software co-design for energy-efficient AI at the edge.

In-Sensor / Near-Sensor Computing

Photonic and electronic accelerators that compute directly at the pixel — eliminating data conversion and movement overhead for vision workloads.

Silicon Photonics & Optical Computing

Micro-ring resonators, photonic crossbars, and Verilog-A compact models for end-to-end optical inference pipelines in Lumerical / Ansys.

In-Memory Computing & Emerging Memory

SRAM, DRAM, ReRAM, and MeFET-based processing-in-memory architectures for CNN and ViT acceleration on TSMC 65nm and FinFET 7nm.

Vision Transformers & Neuro-Symbolic AI

Hardware-aware ViT compression and HyperDimensional Computing for transparent, efficient reasoning on resource-constrained devices.

Selected Publications

Featured work

First-author and lead-collaborator papers. Full list on Google Scholar.

DATE
2026

INSPIRE: In-Sensor Compressed Weight Retrieval for Enhancing ViT Efficiency at Edge

S. Ahmed, D. Najafi, M. A. Nahian, N. Khoshavi, A. A. Arafat, M. N. Rizve, M. Nikdast, A. S. Rakin, S. Angizi

Best Paper Award Application Design Track Vision Transformers
arXiv
2024

Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate

D. Najafi, H. Errahmouni Barkam, M. Morsali, S. Jeong, T. Das, A. Roohi, M. Nikdast, M. Imani, S. Angizi

First Author Neuro-Symbolic AI HyperDimensional Computing
ICCAD
2025

Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics

M. Morsali, C. Zhou, D. Najafi, et al., S. Angizi

Vision Transformers Silicon Photonics
DAC
2024

Lightator: An Optical Near-Sensor Accelerator with Compressive Acquisition Enabling Versatile Image Processing

M. Morsali, D. Najafi, et al., S. Angizi

Optical Acceleration 84.4 KFPS/W
DATE
2024

OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing

D. Najafi, M. Morsali, et al., S. Angizi

First Author In-Sensor Computing 6.68 TOp/s/W
Journey

Timeline

Academic and research milestones along the way.

  1. 2026 →
    Continued research in Edge AI hardware
    Pushing forward on in-sensor and in-memory computing, emerging memory, silicon-photonic acceleration, and efficient architectures for edge intelligence.
  2. May 2026
    NY Architecture and Systems Day (NYASD) 2026 — Princeton
    Presented our latest computer architecture research at NYASD 2026, hosted at Princeton University — in the presence of Prof. Margaret Martonosi and the broader NY architecture community.
  3. May 2026
    Passed Ph.D. Proposal Defense
    Successfully defended dissertation proposal and advanced as a Ph.D. candidate.
  4. Apr 2026
    DATE 2026 Best Paper Award Award
    "INSPIRE: In-Sensor Compressed Weight Retrieval for Enhancing ViT Efficiency at Edge" — Application Design Track, DATE 2026.
  5. Oct 2025
    ICCAD 2025 Contribution
    "Opto-ViT: Architecting a Near-Sensor Region of Interest-Aware Vision Transformer Accelerator with Silicon Photonics."
  6. Aug 2025
    First-author paper at COINS 2025
    "Dyna-Optics: Architecting a Channel-Adaptive DNN Near-Sensor Optical Accelerator for Dynamic Inference."
  7. Jul 2025
    First-author paper at ISVLSI 2025
    "From Pixels to Reasoning: A Cross-Layer Photonic Design for Edge Visual Intelligence."
  8. Jun–Jul 2025
    GLSVLSI 2025 — Multiple Contributions
    Magnetic in/near-sensor architectures, digital processing-in-memory, and event-driven spatiotemporal in-sensor acceleration.
  9. Jun 2025
    CVPR 2025 Contribution
    "DeepCompress-ViT: Rethinking Model Compression to Enhance Efficiency of Vision Transformers at the Edge."
  10. Mar 2025
    GOMACTech 2025
    Contributed to work on near-sensor visual processing with silicon-photonics-enabled edge intelligence.
  11. Dec 2024
    Neuro-Photonix Preprint
    "Neuro-Photonix: Enabling Near-Sensor Neuro-Symbolic AI Computing on Silicon Photonics Substrate" released on arXiv.
  12. Aug 2024
    Passed Ph.D. Qualifying Exam
    Cleared the qualifying exam in the doctoral program.
  13. Jun 2024
    DAC Young Fellow + Best Presentation Award
    Named DAC Young Fellow at IEEE/ACM DAC and won Best Presentation. "Lightator" presented at DAC 2024.
  14. Mar 2024
    DATE 2024 — First-author paper
    "OISA: Architecting an Optical In-Sensor Accelerator for Efficient Visual Computing" presented at DATE 2024.
  15. Jan 2024
    SRC Research Scholar
    Joined the Semiconductor Research Corporation Research Scholars Program — research in optical simulation and photonic computing.
  16. Jan 2024
    ECE Ph.D. Student of the Month Award
    Featured by the NJIT ECE Department for research on Processing-in-Memory and In-sensor computing.
  17. Dec 2023
    Best Presentation, NJIT ECE Graduate Research Day Award
    Recognized at the College of Engineering GSA Research Day.
  18. Fall 2023
    Started Ph.D. at NJIT
    Began doctoral studies in Electrical and Computer Engineering. Joined the ACAD Lab under Prof. Shaahin Angizi to work on in-sensor / in-memory computing and emerging memory systems.
Toolbox

Technical skills

Simulation & EDA

Cadence Virtuoso HSPICE Vivado Verilog-A ABC TSMC 65nm FinFET 7nm

Photonic Tools

Lumerical (FDTD/MODE/INTERCONNECT) Ansys Optics Zemax Speos MR modeling

Programming

Python MATLAB Verilog VHDL C / C# LaTeX

AI / Workflow

Git / GitHub GitHub Copilot Claude Cursor VS Code
Recognition

Honors & awards

DATE 2026 Best Paper Award

Application Design Track · April 2026

DAC Young Fellow 2024

Best Presentation Award · IEEE/ACM DAC

Young Fellow Travel Grant

2024

Student of the Month

NJIT ECE · January 2024

Best Presentation

College of Engineering GSA Research Day · Fall 2023

Judge — NCE Design Showcase

First-Year Engineering · 2024 & 2025